The present invention relates to a method and semiconductor structure for implementing reach through buried interconnect in building semiconductors including silicon-on-insulator (SOI) devices.
Fabricating smaller, more densely packed devices having greater computing capability is a continuing objective in building semiconductor devices. Silicon-on-insulator (SOI) technology is an enhanced silicon technology currently being utilized to increase the performance of digital logic circuits. By utilizing SOI technology designers can increase the speed of digital logic integrated circuits or can reduce their overall power consumption. These advances in technology are leading to the development of more complex and faster computer integrated circuits that operate with less power.
It is desirable in building semiconductors including SOI technology to fabricate a connection from a conductor at a given level through a stack including a first insulator, an intermediate conductor, and a second insulator to another conductor without making electrical connection to the intermediate conductor. Such a connection is referred to as a reach through buried interconnect.
A need exists for an effective mechanism in building semiconductors including SOI technology for fabricating such a reach through buried interconnect.
Principal objects of the present invention are to provide a method and semiconductor structure including silicon-on-insulator (SOI) devices for implementing reach through buried interconnect. Other important objects of the present invention are to provide such method and semiconductor structure for implementing reach through buried interconnect substantially without negative effect and that overcome many of the disadvantages of prior art arrangements.
In brief, a method and semiconductor structure including silicon-on-insulator (SOI) devices are provided for implementing reach through buried interconnect. A semiconductor stack includes a predefined buried conductor to be connected through multiple insulator layers and at least one intermediate conductor above the predefined buried conductor. A hole is anisotropically etched through the semiconductor stack to the predefined buried conductor. The etched hole extends through the at least one intermediate conductor and the insulators to the predefined buried conductor in the semiconductor stack. A thin layer of insulator is deposited over an interior of the etched hole. The deposited thin insulator layer is anisotropically etched to remove the deposited thin insulator layer from a bottom of the hole exposing the predefined buried conductor in the semiconductor stack with the thin insulator layer covering sidewalls of the hole to define an insulated opening. The insulated opening is filled with an interconnect conductor to create a connection to the predefined buried conductor in the semiconductor stack.
A semiconductor structure for implementing reach through buried interconnect in building semiconductors including silicon-on-insulator (SOI) devices includes a semiconductor stack including a predefined buried conductor to be connected through multiple insulator layers and at least one intermediate conductor above the predefined buried conductor. An etched hole extends through the at least one intermediate conductor and the insulators to the predefined buried conductor in the semiconductor stack. A thin layer of insulator covers sidewalls of the etched hole providing an insulated opening. An interconnect conductor extending through the insulated opening is connected to the predefined buried conductor in the semiconductor stack.